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minkyo's avatar
minkyo
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5 years ago

ALTPLL ouput clock doesn't synchronize.

Hi I'm using cyclone 10 lp which is 10CL120YF484I7G on my own board. My problem is when I made clock using alt pll, the clock's phasee didn't matches. Actually, I'm using 2 alt pll to make...
EngWei_O_Intel's avatar
EngWei_O_Intel
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5 years ago

Hi Minkyo


Thanks for your inquiry. May I know if your input reference clock is misaligned with PLL's output clock? Or do you mean you have multiple PLL's outclocks misaligned?


Thanks.

Eng Wei


minkyo's avatar
minkyo
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5 years ago

Hi

Thank you for the answer.

I mean, the output clocks misaligned.

For example, when Plll outputs a,b,c, a,b,c are not aligned each other.

Could I make output clocks aligned ?

Thanks