--- Quote Start ---
Hello, I am new in FPGA based development. Currently I am trying to learn how to integrate my custom hardware modules on FPGA. Can anyone tell me about Avalon and Qsys ? I believe Avalon is the master-slave bus model where I can hook up my master/slave modules. On the other hand, Qsys is the tool which actually helps to implement it. Is my understanding correct? Instead of using a shared bus, does Altera support NoCs ?
--- Quote End ---
Your understanding is correct. The NoC implementation that Qsys uses is completely transparent to you as the user. You create your custom Avalon-MM components as masters or slaves with parallel interfaces.
Here's a tutorial you may find useful
http://www.alterawiki.com/wiki/using_the_usb-blaster_as_an_sopc/qsys_avalon-mm_master_tutorial I plan on revising this when I get time, and I'll add details on how to integrate custom IP cores. It currently shows how to use only Altera IP cores. Since you're new to FPGAs, it should be useful.
Cheers,
Dave
Honored Contributor
