Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
10 years ago

Altera ModelSim 10.3d with Quartus 14.0

Hi,

I am currently using Quartus 14.0 and need to simulate a Stratix V Qsys design which uses FIR filters from the Altera FIR Filter Compiler as part of the design. As a result the simulation requires mixed mode simulation - the FIR filters generate VHDL simulation models, but the rest of my design is Verilog.

From what I gather ModelSim Altera Starter Edition (v10.1d) does not support mixed mode simulation - I get the following error when simulating:

#  ALTERA version supports only a single HDL#  ** Fatal: (vsim-3039) ...: Instantiation of '...' failed.#     Time: 0 ps  Iteration: 0  Instance: ... File: ...#  FATAL ERROR while loading design

I understand that as of Quartus 15.0 (Altera ModelSim 10.3d), that Mixed-mode simulation is now supported. However the simulation is for part of a massive project which I do not want to have to upgrade to Quartus 15.0 - I feel it's too risky to do given how many times Altera seem to keep changing and breaking IP cores and messing around with how Qsys behaves. I have about 100 IP cores that I have made which would need to be tested with 15.0, so its really not worth it.

---

So the question is, is it possible to install the latest version of ModelSim (10.3d) with an older version of Quartus (14.0), or will this cause problems?

3 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    There are only 2 solutions to this:

    1. Move to Q15. All Q14 generated cores should compile just fine in Q15.

    2. Buy a licence for modelsim.

    They are your only 2 realistic options.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    In the end I moved to Q15.0, and then regenerated the Qsys system for my design. When I recompiled it nocked 30MHz of the Fmax of several clock domains in the design. After two weeks optimising the code and having to enable all of the optimisation options (retiming, logic duplication, optimise for speed, etc.) I finally managed to get the design to meet timing in Q15. At least I can simulate the new FIR filter part of the design now.

    Just to be really irritating, on the day I finally got the code to meet timing on Q15 and ensure that all my optimisations still function correctly... Q15.1 was released! Somehow I doubt I'll be upgrading if it's going to cost another 30MHz.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor

    I think if thing work well in Q15, then you might not need an upgrade unless you need to use latest version of IP or feature.