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Altera_Forum
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18 years ago

Altera FPGA ring oscillator low level implementation

Hi all, I'm a student working on a summer research project. I've been stuck on the same problem for some time now and would greatly appreciate any help. Software/Hardware: Quartus II so...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Thank you for the responses, I think I'm almost there.

Is there a way to implement a 2 input LCELL? The reset input is essential to the design. I'm thinking about just taking the output of an LCELL buffer and ANDing that with the reset input, but was wondering if theres another way.

Thanks.

Paul