Altera_ForumHonored Contributor10 years agoAlarm clock code for verilog cannot compile Hi, the attached file is the code that I created for alarm clock school project It keeps giving me the error 'near "end": syntax error, unexpected end'. I have tried many ways to readjust the c...Show MoreDigi system assignment.doc14 KB
Altera_ForumHonored Contributor10 years agoSeems to be syntax error. Can double check on the syntax or typo?
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