Forum Discussion
Altera_Forum
Honored Contributor
14 years ago --- Quote Start ---
avs_s1_address :in std_logic_vector(1 downto 0);
avs_s1_read : in std_logic;
avs_s1_readdata :out std_logic_vector(31 downto 0);
avs_s1_byteenable: in std_logic_vector(3 downto 0) :="0100"); how to make it readdata to READ by avalon interconnect. kindly give me the solution. --- Quote End --- Here is one solution:
avs_s1_readdata <= your_addr_00_reg when (avs_s1_address = "00") else
your_addr_01_reg when (avs_s1_address = "00") else
your_addr_10_reg when (avs_s1_address = "00") else
your_addr_11_reg;
Where addr_XX_reg is your internal registers that holds whatever the collection of readable registers are for your component. Note that readdata does not need to depend on read at all, it is simply a function of the address input. Kevin Jennigns