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Altera_Forum's avatar
Altera_Forum
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13 years ago

Additional circuit within a circuit - if then else

Hello, I am a beginner to VHDL and currently have an assignment to complete. It is as follows: A digital circuit has two 4-bit inputs a I have written the architecture correct ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
13 years ago

Thje error message seems self-explanatory to me, isn't it?

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Error (10309): VHDL Interface Declaration error in test.vhd(17): interface object "sub" of mode out cannot be read. Change object mode to buffer.

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