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Altera_Forum's avatar
Altera_Forum
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12 years ago

Add test bench to project at modelsim

Hi , i create new project at modelsim and wrote hdl design and there aren't errors . i create test bench file at VHDL and i need to add the file to the project and compile the test bench , H...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
12 years ago

You can compile a testbench automatically from Quartus. Add the testbench to your Quartus project. Then go to the menu:

Assigments->Settings->Simulation

go to "Compile TestBench" click on TestBench and the add the testbench, etc...

When you compile your project again your testbench will compile too. And you can start Model Sim form Menu:

Tools->Run EDA Tool Simulation Toot->EDA RTL Simulation.

Also, if you do a timing simulation, you can set it to open Model Sim automatically after Compilation.