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Altera_Forum
Honored Contributor
12 years agofor example, my ADC has 4 pins that supposedly inter connected between the FPGA and the ADC,
SCLK, CS, DataIN, DataOUT In VHDL, do I declare them with respect to the FPGA? which would mean SCLK, CS and DataIN would be OUT pins, and DataOUT would be an IN pin? or is it with respect to the ADC, which would indicate otherwise?