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Altera_Forum
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13 years ago

about vhdl code for cic interpolation filter

i am attaching one pdf file based on cic filter.In the bitgrowth section the author has mentioned about the increase in the bits at the output stage .Suppose if i am writing a vhdl code for cic inter...
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Altera_Forum
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13 years ago

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So can you give the solution for the problem for the overflow in the second integrator stage?

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Either Hogenauer got it wrong or you are doing something wrong.

Do you insert 7 zeros after every sample at the input to first Integrator?

Are you working at RTL level or matlab?