about vhdl code for cic interpolation filter

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according to given equation :for decimator, last comb output bits = 9 * log2(8*1) + 23 = 50 bits

and it says, the same should be used at each comb or integrator stage. Leave truncation to final output.

for interpolator:

last stage = 23 + 9 -1 = 31 bits

and stage before last requires 23+8-1 = 30 bits and so on

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whether this increase in bits should be applied at each stage of comb and integrator section or only at end of each stage of comb section or only at end of each stage of integrator section