Forum Discussion
Occasional ContributorAbout the "set_false_path" command
My apologize for not understand your previous question correctly.
Correct me if I am wrong. This look like asynchronous input to the synchronizer logic.
Setting false path to the [asynchronous input paths to synchronizer logic] (path 1) should be sufficient.
Regards,
Richard Tan
Occasional ContributorThank you for answering.
Thank you for your detailed explanation.
In the circuit shown in the figure, if data and reset are asynchronous signals, is the following correct description of the "set_false_path" command?
Target path1: set_false_path -from [get_port {data}] -to [get_pins {REG1|datain}]
Target path2: set_false_path -from [get_port {reset}] -to [get_pins {REG1|areset}]
Am I correct in my understanding that if you do not want to run only a specific analysis, you should specify options such as -Setup, -Hold, etc. as necessary?
I apologize for asking so many detailed questions, but I would appreciate it if you could explain it to me.
Super ContributorAsynchronous data input to a register? Sure you could false path that. Pretty unusual though.
As for using -setup and -hold with set_false_path, these are rarely used. The only use I can think of is with DDR interfaces where you need to specify which analyses to not perform between the specific launch and latch edges (rising edge data vs. falling edge data).
- Yamada1
Thank you for answering.
I'm sorry that I don't have enough words.
I assumed a path from the input port to the first stage register, such as receiving manually operated signals such as toggle switches, and receiving start-stop synchronization signals.
Regarding the description of the "set_false_path" command, am I correct in understanding that there is no problem with the method described in the previous reply?
I apologize for the repeated questions, but I would appreciate it if you could give me some guidance.
