Yamada1
Occasional Contributor
Occasional ContributorAbout the minimum value constraint (-min option) of "set output delay"
I use "set output delay" when constraining the timing between the FPGA and the subsequent device, but it would be helpful if you could tell me the following points about the minimum value constraint ...
Hello,
You can find set_output_delay documentation here: https://www.intel.com/content/www/us/en/docs/programmable/683243/23-1/output-constraints-set-output-delay.html
Yes, fitter is notified of the setup and hold timing requirements from the set_output_delay. So fitter will do its best to meet this requirement during place & route.
Regards,
Nurina
