Honored ContributorHi! My question is about the stability of Signal Tap II, it seems to be strange. When i add signals to or subtract signals from my STP file, the whole program does not work at all! It's not every time, but indeed happens quite often. What's most typical is all the signals in STP will become zeros.
I used maximum fan-out constraint, but it only worked sometime. What's wrong with this? Thanks!
Honored ContributorNobody replied? Anybody met this problem?
Honored ContributorHonored ContributorI'm using Quartus 9.1, and using pre-synthesis nodes.
what's different between pre-synthesis and post-fit nodes? I have thought post-fit nodes don't work most of the time.Honored ContributorHonored ContributorHi, Happy new year 2011 (before 2012 :-) )
When you add or remove signals in STP, you have to recompile the project. Normally, you can't connect to an in situ STP if it doesn't match your STP file. Perhaps, have a look at timing constraints. STP uses a jtag clock and there will be a cross clock .... Do your design meet timing requirements ? --- Quote Start --- Can please explain your problem more detailed ? E.g. what exactly do you change when it is not working .... --- Quote End ---Honored ContributorHonored ContributorHello! Happy new year!
--- Quote Start --- Hi, Happy new year 2011 (before 2012 :-) ) When you add or remove signals in STP, you have to recompile the project. Normally, you can't connect to an in situ STP if it doesn't match your STP file. Perhaps, have a look at timing constraints. STP uses a jtag clock and there will be a cross clock .... Do your design meet timing requirements ? --- Quote End --- I have recompiled my project, and all the timing requirement was met. But as what i said, i used "maximum fan-out" constraint, and it will solve the problem sometime, but not every time. And I'm sure that every time all the timing requirement was met.
