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Pastel's avatar
Pastel
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1 year ago
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About memory usage, Quartus, MAX10

Hello! I have developed a FPGA software (NB: I'm not sure it can be called software, but anyway verilog code), about 2+ years ago. As it needed a sinewave, I used coefficients stored in a double a...
Hdl
  • FvM's avatar
    FvM
    1 year ago
    Can't be answered without seeing the complete design. Most likely two bits are redundant (not driving actual logic).
FvM's avatar
FvM
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1 year ago
Can't be answered without seeing the complete design. Most likely two bits are redundant (not driving actual logic).
  • Pastel's avatar
    Pastel
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    1 year ago

    Hello!

    Thanks for your reply. Indeed, what you describe is right. I wanted to build a complete new version

    from scratch because of beginner problems in my very first project, beginner that I still am.

    I oversimplified the project. It used to make a linear interpolation between 2 consecutive samples,

    caculating in 18 bits, then rendering the result in 16. An for a start, I was using only one of the

    samples (i.e. no interpolation), therefore the 2 last bits were not used at all.

    Thanks a lot for your help, it works now, and the compilation reports 18432 bits used, which is

    exactly 18 * 1024. The numbers match, now.

    Pascal