A question regarding running the PAM-4 example files for the Stratix 10 TX FPGA

https://www.intel.com/content/www/us/en/design-example/715120/intel-stratix-10-fpga-tx-pam4-2-x-51-gbps-with-sma-design-example.html?wapkw=stratix%2010%20tx%20pam4

I am trying to run the "Intel® Stratix® 10 FPGA – TX PAM4 2 x 51 Gbps with SMA Design Example" from the link provided, but I encounter a discrepancy from the guide. In step 5, it states that the channels should be auto-populated, but they do not appear. The photo is taken after completing the compilation and programming through the programmer, showing that the channels are not displayed. How can I get this example to work?

My product model is 1ST280EY2F55E1VG.

1.Follow the instruction in the Design Store to prepare the design template and load the design
into Intel® Quartus Prime Pro Edition Version 18.1
2. Perform full compilation with the design
3. Program the SOF file generated into the development kit
4. After the programming is completed, open the Tools -> System Debugging Tools -> Transceiver
Toolkit and establish connection to the Intel® Stratix® 10 TX device as shown in Figure 4

5. You should observe two channels auto-populated in Transceiver Toolkit