Forum Discussion
Altera_Forum
Honored Contributor
11 years agoDoes the verify fail with your original error message:
'209062 flash loader ip not loaded on device 1' or '209027 verification failed for device number 1'? The following is a trace of a successful verify sequence, using a .jic file, with a single FPGA image in. --- Quote Start --- Info (209060): Started Programmer operation at Thu Dec 11 13:43:22 2014 Info (209016): Configuring device index 1 Info (209017): Device 1 contains JTAG ID code 0x020F10DD Info (209007): Configuration succeeded -- 1 device(s) configured Info (209018): Device 1 silicon ID is 0x16 Info (209021): Performing CRC verification on device(s) Info (209011): Successfully performed operation(s) Info (209061): Ended Programmer operation at Thu Dec 11 13:43:25 2014 --- Quote End --- Can you post the trace you see in Quartus? Further thoughts - which would lead to the 'Verification failed for device number 1' error. Does your FPGA image use (write to) the Serial PROM? If your FPGA image can write to the PROM after power up and modify it's contents (in a space beyond the FPGA's boot image), then verification might fail with that error. Cheers, Alex