Altera_Forum
Honored Contributor
12 years ago2D Array VHDL
Hi!!
I'm using the parallel_add megafunction from altera and the data port is define as: ---------------- data : in altera_mf_logic_2D(size - 1 downto 0, width- 1 downto 0); with type altera_mf_logic_2D is array (NATURAL RANGE <>, NATURAL RANGE <>) of STD_LOGIC; ---------------- in my code this port look like data : in altera_mf_logic_2D(23 downto 0, 31 downto 0); and I want to connect my_data to it, but my data is defined using subtype and type ----------- signal my_data : t_32bit_data_array(23 downto 0); with subtype t_32bit_data is std_logic_vector ( 31 downto 0); type t_32bit_data_array is array ( natural range <>) of t_32bit_data; ----------- Ideas???? I tried : --for first 32bit value for ex. data(0 , 31 downto 0) <= my_data(0); doesnt work (Error (10486): VHDL error at beamforming_t.vhd(247): slice of object cannot be specified for object that has an array type of more than one dimension) tkxs!