Forum Discussion
Contributor22.1 PRO: (*preserve_for_debug*) signals not preserved
Hello,
Alright thanks for the feedback. I've let them know that you expect this fix to apply to all data types.
In the meantime your only workaround is to have the signal connected to an i/o port.
With that, I now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.
Regards,
Nurina
P/S: If you like my comment, feel free to give Kudos. If my comment solved your problem, feel free to accept my comment as solution.
ContributorI never talked about a pin nor an I/O pin.
Sorry, if I understand well, your solution is to not use the feature supposed to be made for that exact purpose?
I can flag any signals I want using Xilinx Vivado's mark_debug and it will automatically detect all the flagged signals, net, register, with or w/o fanout and allows me to add them without other manual intervention, it also detects which clock the signal is driven by.
I hoped preserve_for_debug had a similar behavior without having to manually create virtual pins on specific signals. I also don't want to care whether the signal has fanout or not. Moreover, the goal is to flag a structure whose some members are connected and some left unconnected.
Super ContributorYou asked "what do you call I/O?", and I call a top-level device package pin an I/O.
Again, the feature is not for I/O or unconnected signals. It's for buried signals that may get optimized away or have their name changed through the course of compilation and optimization. With the preserve for debug feature, there is no need to even create an unconnected signal like what you are doing since you can preserve whatever that stub is connected to and then tap it in Signal Tap. You don't have to alter your design just to accommodate debugging. And when you're done with Signal Tap, you simply disable it and recompile to remove the Signal Tap logic implementation.
So in your example, tap whatever is driving out_a in the instantiated entity. You can use preserve for debug on it if you want and that will guarantee it's preserved and make it easy to find by being in its own filter in the Node Finder when adding signals to Signal Tap.
- alexislms
noprune : Prevents Intel Quartus Prime from removing or optimizing a fanout free register
a fanout free register is exactly an unconnected signal.
Could you explain your workflow to add signals in signaltap without the need to modify the code with any verilog attributes? With eventually a simple example.
I'm new to Intel and compared to Xilinx's mark_debug and ILA, it seems very time consuming then I'd be glad to know your method.
Thank you,
