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adamS's avatar
adamS
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7 years ago

write continuous data to sdram on DE0 nano board

Hi, I want to write data to sdram via nios2, then read data out and connect to LEDs to see if the data is correct. Below is my code and results. In the code I add printf("isr\n") to make sure int...
JOHI's avatar
JOHI
Icon for Contributor rankContributor
7 years ago

Hello,

Without your Qsys / Platform Designer code it is not easy to help you.

But based on what I see, there is no limit to the value that "incre" can have.

Therefore sooner or later you risk to write beyond the limits of the dedicated memory.

Also it is very well possible that you are writing into the zones that are used for other purposes hence making your system unstable.

Best Regards,

Johi.

  • adamS's avatar
    adamS
    Icon for New Contributor rankNew Contributor
    7 years ago

    Hi Johi,

    ​

    Thanks for the reply,

    my qsys and top level are as below,

    I use the onchip memory as nios2 cpu's memory.

    ​

    Yes, it's very likely that data is written into the zone that is for other purpose,

    is there any way to avoid it?

    adam

    ​

    ​

    module SPCM_NIOS(
 
	//////////// CLOCK //////////
	CLOCK_50,
 
	//////////// LED //////////
	LED,
 
	//////////// KEY //////////
	KEY,
 
	//////////// SDRAM //////////
	DRAM_ADDR,
	DRAM_BA,
	DRAM_CAS_N,
	DRAM_CKE,
	DRAM_CLK,
	DRAM_CS_N,
	DRAM_DQ,
	DRAM_DQM,
	DRAM_RAS_N,
	DRAM_WE_N,
 
	//////////// GPIO_0, GPIO_0 connect to GPIO Default //////////
	GP0,
	GP0_IN,
 
	//////////// GPIO_1, GPIO_1 connect to GPIO Default //////////
	GP1,
	GP1_IN 
);
 
//=======================================================
//  PARAMETER declarations
//=======================================================
 
 
//=======================================================
//  PORT declarations
//=======================================================
 
//////////// CLOCK //////////
input 		          		CLOCK_50;
 
//////////// LED //////////
output		     [7:0]		LED;
 
//////////// KEY //////////
input 		     [1:0]		KEY;
 
//////////// SDRAM //////////
output		    [12:0]		DRAM_ADDR;
output		     [1:0]		DRAM_BA;
output		          		DRAM_CAS_N;
output		          		DRAM_CKE;
output		          		DRAM_CLK;
output		          		DRAM_CS_N;
inout 		    [15:0]		DRAM_DQ;
output		     [1:0]		DRAM_DQM;
output		          		DRAM_RAS_N;
output		          		DRAM_WE_N;
 
//////////// GPIO_0, GPIO_0 connect to GPIO Default //////////
inout 		    [33:0]		GP0;
input 		     [1:0]		GP0_IN;
 
//////////// GPIO_1, GPIO_1 connect to GPIO Default //////////
inout 		    [33:0]		GP1;
input 		     [1:0]		GP1_IN;
 
 
 
 spcm_qsys u0 (
	  .clk_50_clk                        (CLOCK_50),                        //                      clk_50.clk
	  .rst_n_reset                       (KEY[0]),                       //                       rst_n.reset
	  .clk_sdram_clk_clk                 (DRAM_CLK),                 //               clk_sdram_clk.clk
	  .new_sdram_controller_0_wire_addr  (DRAM_ADDR),  // new_sdram_controller_0_wire.addr
	  .new_sdram_controller_0_wire_ba    (DRAM_BA),    //                            .ba
	  .new_sdram_controller_0_wire_cas_n (DRAM_CAS_N), //                            .cas_n
	  .new_sdram_controller_0_wire_cke   (DRAM_CKE),   //                            .cke
	  .new_sdram_controller_0_wire_cs_n  (DRAM_CS_N),  //                            .cs_n
	  .new_sdram_controller_0_wire_dq    (DRAM_DQ),    //                            .dq
	  .new_sdram_controller_0_wire_dqm   (DRAM_DQM),   //                            .dqm
	  .new_sdram_controller_0_wire_ras_n (DRAM_RAS_N), //                            .ras_n
	  .new_sdram_controller_0_wire_we_n  (DRAM_WE_N),   //                            .we_n
	  .key_export (KEY),
	  .led_export (LED)
 );
 
 
 
endmodule

    ​