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Altera_Forum
Honored Contributor
13 years agoWhy Vectored Interrupt Controller IRQ -1 ?
Hello Friends i have added Vectored Interrupt Controller and generate the BSP but system.h reflect that VIC IRQ is -1 /* VIC configuration */ #define ALT_MODULE_CLASS_VIC altera_vic #def...
Altera_Forum
Honored Contributor
13 years agoIf I remember correctly your irq must have higher priority than the interrupts used by OS.
In the case of SSS application, you must assign a lower priority to system timer and network IRQs.