Altera_Forum
Honored Contributor
10 years agoWhy my Nios II run slowly ?
Dear all,
I have do experiment on the Cyclone V SOC. [Helio evaluation board] And I put one nios/e and onchip-ram into the FPGA fabric. Currently, I could read/write the data in/out from Onchip RAM. Now, I am measuring the time duration for my source code. I discover that each instruction runs slowly. Below is my simple source code. I don't understand that the one line[*pdata = i++;] I comment , it needs to take 1us. It should not be correct performance. Or should I choose the better version of Nios II ? Anyone could suggest or hint me why and what to do? Attached file is my zip file of QSYS. # include <stdio.h># include "system.h"# include "altera_avalon_pio_regs.h" unsigned int LED_TOGGLE = 0; unsigned char *pData = ONCHIP_MEMORY2_1_BASE; int main() { int i = 0; printf("Hello from Nios II!\n"); while(1) { IOWR_ALTERA_AVALON_PIO_DATA(LED_PIO_BASE,LED_TOGGLE); LED_TOGGLE = ~LED_TOGGLE; //*pdata = i++; } return 0; }