Why does ROMRAM ECOS not initialize ICache of NIOS

Please refer to NIOS II vector.s file. Why does NIOS II ROMRAM application not initialize NIOS II I-Cache?

/*

* ========================================================================

* _hardware_reset

*

* This is the reset entry point for Nios II.

*

* At reset, only the cache line which contain the reset vector is

* initialized. Therefore the code within the first cache line is required

* to initialize the instruction cache for the remainder of the code.

*

* Note that the automatically generated linker script requires that

* the .init section is less than 0x20 bytes long.

*/

.section .entry, "xa"

.align 2

/*

* Some tools want to know where the reset vector is.

*/

.globl _hardware_reset

/*

* Explicitly allow the use of r1 (the assembler temporary register)

* within this code. This register is normally reserved for the use of

* the compiler.

*/

.set noat

# ifdef CYG_HAL_STARTUP_ROM

_hardware_reset:

/* Initialize all cache lines within the instruction cache */

# if NIOS2_ICACHE_SIZE > 0

/*

* The assumption here is that the instruction cache size is always

* a power of two.

*/

# if NIOS2_ICACHE_SIZE > 0x8000

movhi r1, %hi(NIOS2_ICACHE_SIZE)# else

movui r1, NIOS2_ICACHE_SIZE# endif

movui r2, NIOS2_ICACHE_LINE_SIZE

0:

initi r1

sub r1, r1, r2

bgt r1, zero, 0b# endif /* NIOS2_ICACHE_SIZE > 0 */

/*

* Having initialised the cache, call the entry point for the .text

* section.

*/

movhi r1, %hiadj(_start)

addi r1, r1, %lo(_start)

jmp r1# endif /* CYG_HAL_STARTUP_ROM */