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Altera_Forum
Honored Contributor
10 years ago --- Quote Start --- Hello, The output protocol of the TSE is very simple. You have a "start of packet", "end of packet", data, and data valid and some optional and informative signals. Knowing this, you can send receive frame easely. Don't forget to configure the TSE via the avalon interface. Regards, Franck. --- Quote End --- Hi, I was trying to do the same and wrote simple logic that processes raw Ethernet frames. However, I couldn't manage to make the hardware run successfully. I am doing the reset correct I think, but I haven't done any initialization. Since I don't use Nios, I wanted to write some Verilog code for issuing commands to the Avalon MM Slave interface of the TSE MAC, but that was unsuccessful until now. Could you tell me how did you configure the TSE registers through the avalon interface? In particular, I am having difficulties understanding the addressing. Here is my code, I was just trying to turn the leds on and off if I read TX_EN and RX_EN to be 1, but they are always 0: case (reg_point) one: begin ctrl_read = 1'b1; ctrl_address[7:0] = 8'h02; next_reg_point = two; end two: begin temp_ctrl_readdata[31:0] = control_readdata[31:0]; if (temp_ctrl_readdata[0] == 1'b1) begin stat = 1'b0; end next_reg_point = three; end three: begin ctrl_write = 1'b1; ctrl_address[7:0] = 8'h02; ctrl_writedata[31:0] = 32'h00002211; if (ctrl_readdata[0] == 1'b1) begin stat = 1'b0; end next_reg_point = four; end four: begin ctrl_read = 1'b1; ctrl_address[7:0] = 8'h02; next_reg_point = five; end five: begin temp_ctrl_readdata[31:0] = control_readdata[31:0]; if (temp_ctrl_readdata[0] == 1'b1) begin stat = 1'b0; end next_reg_point = six; end six: begin if (ctrl_readdata[1:0] == 2'b11) begin led6 = 1'b0; stat = 1'b0; end next_reg_point = seven; end seven: begin if (ctrl_readdata[1:0] == 2'b11) begin led6 = 1'b0; stat = 1'b0; next_reg_point = seven; end This is the comb logic. In the sequential logic block I do the following: state <= next_state; reg_point <= next_reg_point; if (state == idle && ( (next_reg_point == three) || (next_reg_point == six))) ctrl_readdata <= temp_ctrl_readdata;