Forum Discussion
Altera_Forum
Honored Contributor
12 years agowhat is the compile environment of cyclone v?
I write a c language file and compile it in my own computer.And I copy the .out file into the Linux system on cyclone v.But it can run.
And I want to know what is the compile environment if cyclone v so I can build a environment in my pc. If someone knows please tell me.Thank you very much!3 Replies
- Altera_Forum
Honored Contributor
I don't know if this matches your question, but a FPGA can be programmed in VHDL or Verilog or OpenCL which is Hardware programming and - if we are talking on Software - you can run a softcore (like the NIOSII) / have a Hardcore µC (on selected devices) on chip. These processors are either programmed using the Eclipse tool coming with ALTERA QII or - at least for the hardcore (I think) - using the hardcore chip manufacturer's tool.
If you are talking on Linux - do you run Linux on the µC on the chip? - Altera_Forum
Honored Contributor
--- Quote Start --- I don't know if this matches your question, but a FPGA can be programmed in VHDL or Verilog or OpenCL which is Hardware programming and - if we are talking on Software - you can run a softcore (like the NIOSII) / have a Hardcore µC (on selected devices) on chip. These processors are either programmed using the Eclipse tool coming with ALTERA QII or - at least for the hardcore (I think) - using the hardcore chip manufacturer's tool. If you are talking on Linux - do you run Linux on the µC on the chip? --- Quote End --- Yes.I run a ubuntu on Cyclone V.But compiling on arm can be very slow.So I want to compile and build a .out file in my own pc.Then copy the .out file into ubuntu and run it. I need to build a cross-compilation environment in my pc.And I want to know how to build it. - Altera_Forum
Honored Contributor
You can look this page http://www.rocketboards.org/foswiki/documentation/gsrd131gittrees#build_toolchain
see the build toochain. It will tell you how to build a corss compliation environment in you pc.Then you can copy the .out file to FPGA and run it.