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Altera_Forum
Honored Contributor
16 years agoweird timer & uart behavour
Hi guys, could anybody tell my why my code hang up when I switch the sys_clk_timer from NONE to SYS_CLK or when I switch stdin and stdout from NONE to UART_0 in the BSP-Editor ??? That's r...
Altera_Forum
Honored Contributor
16 years agoThis could be due to the system clock timer being very low, by default it is 1us. I think when you enable sys_clk_timer to SYS_CLK, it will generate an interrupt for every 1us and the NIOS takes ~15us to service the interrupt. This will flood the NIOS with interrupts. Option is to increase the value of system clock timer in the SOPC builder to 1 ms or greater so the NIOS will have enough time to service it.