Weird heap access in NIOS w/DDR2 memory

I would simulate the system and look at the data being presented to the SDRAM. Also if you are not using somewhat recent tools like 9.0 or 9.1 you could be seeing the bug I found in the HPDDR controller. I can't remember what version has the fix but the controller didn't declare itself as a burst wrapping slave port which could lead to a functional failure depending on what kind of bursting master you hook up to it.