Warning: uniphy_ddr2_1.HCX_reconfig: Interface has no signals (SOPC builder)

Hi,

first of all you get a warning not an error. So your design could run properly. I have not used this controller yet, but I just was interested in. I found a sheet were you can get some informations:

http://www.altera.com/literature/hb/external-memory/emi_ddr3up_ug.pdf

On page 96 you can find the signals for pll_reconfiguration. I think this is your reconfiguration port. If you generate your files with the sopc-builder do you get these signals? If you don´t want to reconfigure the PLL you don´t have to care about this massage I think.