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Altera_Forum
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15 years ago

Verilog Program - Need help with it

Hello all, I have no clue about Verilog and I want to understand a bit of program that might be useful to me. Would you happen to know what this means? I am trying to convert that into VHDL. I gue...
Altera_Forum's avatar
Altera_Forum
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15 years ago

The correspondences between verilog and VHDL terminology are correct.

A "module" in verilog however corresponds to both a "entity" and "architecture" combination in VHDL.

In Quartus-II you can use an instance of this module in verilog in a higher level VHDL description. It is easy to mix VHDL and verilog.