Verilog DMA Controller

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originally posted by rhaikh@Jan 17 2006, 06:21 PM

nope, i read up on the avalon bus and implemented those signals within my custom logic, and created an sopc builder component. the dma_control_master port in my component connects to the control_port_slave port on the dma.

that's a cool link, though...

anyway, after looking at the internal dma signals (i.e. staring at modelsim until lightbulbs went off), i figured out that it's actually just not getting the proper address.

i send it a 32-bit address, 0x00000003, and it reads a 3-bit address 0b000. when i send it address 0x00000006, it reads 0b001. so my guess right now is that it's somehow getting address [4:2] instead of [2:0] for some reason.. about to give that a try. doesn't really make sense, but the problem is definitely in the address...

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Yep, that was totally it. I&#39;m not sure if I&#39;m going to try changing my address signal to 3 bits from 32, or if I should just left shift all of my address values by two..

To be clear: I was trying to write to address 3, and it was reading address zero. I sent it address b01100 instead of b011, and sure enough, it read b011 - [4:2] instead of [2:0].