Verilog DMA Controller

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originally posted by hippo@Jan 17 2006, 04:43 PM

are you using the ref design of avalon microsequencer ?

http://www.altera.com/end-markets/refdesig...-avl-micro.html (http://www.altera.com/end-markets/refdesigns/sys-sol/indust_mil/ref-avl-micro.html)

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Nope, I read up on the Avalon bus and implemented those signals within my custom logic, and created an SOPC builder component. The dma_control_master port in my component connects to the control_port_slave port on the DMA.

That&#39;s a cool link, though...

Anyway, after looking at the internal DMA signals (i.e. staring at ModelSim until lightbulbs went off), I figured out that it&#39;s actually just not getting the proper address.

I send it a 32-bit address, 0x00000003, and it reads a 3-bit address 0b000. When I send it address 0x00000006, it reads 0b001. So my guess right now is that it&#39;s somehow getting address [4:2] instead of [2:0] for some reason.. about to give that a try. Doesn&#39;t really make sense, but the problem is definitely in the address...