Altera_Forum
Honored Contributor
21 years agoVerifying EPCS images
QII4.1SP1
I have both an EPCS header and a Jtag header which allows me to use sof, pof or jic. The sof and pof files are default outputs of Quartus. The jic file is produced from the default sof by using the Quartus file convert utility. I noticed that when I programmed the EPCS1SI8 device with the jic over Jtag, it would fail to verify against the pof using the direct EPCS header. I did find that if I also used the file convert utility to produce a second pof file from the default sof, this pof would verify OK against the jic image. So it appears that the pof image produced by a Quartus compile does not match images produced by the Quartus file convert utility. The files are all roughly the same size. I would expect differences in the files themselves but not the images they produce. Is this a bug? Does the difference produce a different FPGA configuration? Is there an existing tool that will let me examine the contents of the EPCS device? The examine box in the Quartus programmer does not seem to do anything. thanks