Verify functionality of design in arria 10 SoC

Hi,

I have generated & loaded .rbf file of Full Adder into corresponding windows partition of SDMMC and booted Arria 10 SoC successfully.

I want to verify the functionality of Full Adder which is loaded into SoC thru .rbf.

Can anyone provide me the steps to verify the design.

Regards,

Karthik.