Verify Failed in Nios II

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• If you are using the new "Altera ALTPLL" component don't use the PLL lock signal as a filter for reset_n (you'll get stuck in reset). This will be fixed in the next version of the IP.

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Thank, BadOmen. Those are all good tips. I'm pretty sure everything is connected and wired to the correct pins, but I will double check. That last one is something I hadn't heard before...can you expand on that please? Specifically, what do you mean by "new"? I am doing exactly as you describe, connecting the ALTPLL locked pin to the reset_n of the CPU, so that definitely concerns me. I am using an old version of the ALTPLL though (6.0). Is this only a new problem? Maybe that's related to other problems I've had that have forced me to stick with the older version rather than upgrade...

If it is a problem with all versions, what would you recommend as a workaround? i.e., how do I ensure that the processor only starts up cleanly with a good clock?

Again, thanks for your responses!