Honored Contributor
Honored ContributorYes, I have changed. for 800*480 resolution my system was wrking in 100 MHZ clock domain which is three times of the pixel clock, since on neek board we are allowed to send pixel data by sequence. So in order to drive 800*600 lcd with 40 MHz pixel clock I have made the clock for cpu, ssram and flash 120 Mhz.
Does this change make this error? I could not understand why. Also, Iwan to ask you one more question. In SOPC builder after we put the components we assign a clock to each component.This clock is used for what? I am asking this because for clocked video output component, I have made the SOPC builder clock 100 Mhz (for 800*480 sequence data).After generating the SOPC builder, and go to the hdl part; in the created sopc_inst.v file for clocked video output component there is a clock assignment one more time.What is the relationship between these clocks. I have drive that clock with 40 Mhz, then I could get the true sync signals.
