Forum Discussion
Altera_Forum
Honored Contributor
Honored ContributorUsing SDRAM Controller on Development Board
Hi, Does anyone have experience sharing the 32 MBytes of SDRAM that is installed on the DSP Development Kit board between the Nios II and some custom FPGA circuitry? I would like to dedica...
Altera_ForumHonored Contributor
Honored ContributorUse a DMA to handle the transfer from converter to memory.
Then you have a shared resource with two masters, processor and DMA. You can setup priority on each to ensure bandwidth. 12.5 MHZ on a 50MHz system gives a load of 25 - 35 % including overhead, that looks OK if hte processore does not use nore than the rest.
