Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
20 years ago

User Guide Puzzle

Turn to page 1-6 of the document of "Nios II Flash Programmer User Guide". ¡°The flash programmer first checks the size of the FPGA configuration data, then appends the software content to the end of it in the EPCS device." The size of the configuration data is changeable, in this case, how does the epcs_controller find the address of the software in the epcs exactly so as to excute it at CPU reset ?

4 Replies

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    20 years ago

    The firmware ROM inside the EPCS controller has software that examines the contents of EPCS flash, searches for the beginning of FPGA configuration data (if present), and extracts the precise length of that configuration data. Then, the EPCS is accessed at an offset equal to that length, which is where the .elf data will be programmed, and where the firmware ROM will start its .elf copy/relocation job.

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    20 years ago

    So consider this...

    I have a custom design where my firmware resides in my EPCS flash, after the FPGA config (which as described below can be variable in length). At boot time, the entire firmware footprint gets shadowed to SRAM, and I execute happily away.

    Now, it comes time for my system to do a firmware upgrade. I need to overwrite my firmware in the EPCS flash device. At what address can I start writing to the EPCS flash? From what I understand, the firware boot ROM has the capability of reading a "length byte" telling it how much flash the FPGA config takes. Is this published?

    Any suggestions for writing my firmware to the EPCS flash without the use of the Flash Programmer?

    Thanks,

    -Terry
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    20 years ago

    The flash programmer (java binary) is also capable of examining EPCS to determine where to start the software, following the FPGA configuration -- this is how it programs software into the right spot.

    The bootloader firmware source (components/altera_nios2/sdk/boot_loader_sources) is, in my opinion, commented very well for assembly language, and describes the boot-process in detail.

    Note that the boot-loader is (currently) only compatible with Cyclone and Cyclone II. Stratix II support will come in a future release.
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    20 years ago

    Hi Jesse,

    Boot from EPCS is just OK (I mean both FPGA configuration data and software image reside in EPCS), but if I store FPGA configuration data into FLASH (U5 in 1C20 dev. kit) and software image into EPCS, Boot fails. Why?

    I have installed the EPCS Bootloader patch from Altera website.

    Seu_xugh