Forum Discussion

Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
20 years ago

up3 accessing memory

I followed "Accessing Sram sdram flash and lcd on UP3 tutorial",but it don't like the tutorial showed;

when i added the Sdram and flash and generate,after i "update symble or block"

,the sram and flash is on one tri state bridge ,and the sdram is on another ?

why ,who can help me.

thanks!

1 Reply

  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    20 years ago

    Hi hanwl,

    > the sram and flash is on one tri state bridge ,and the sdram is on another ?

    >

    > why ,who can help me.

    In the SOPCBuilder SDRAM Controller configuration box, make sure you selected

    the "Controller shares dq/dqm/addr I/O pins" checkbox.

    Regards,

    --Scott