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Altera_Forum
Honored Contributor
22 years agoUnexpected activity on a tri-state address bus
Hi, I am working with NIOS II and a custom board. I have made a board configuration with tri-state bus for my future SRAM/Flash... Right now I am not using it and I configured NIOS II IDE to pla...
Altera_Forum
Honored Contributor
22 years agoHi Pszemol,
This activity is legal as per Avalon; just as long as the accesses are not qualified with chipselect! Address and data bus values can be driven by what a master is doing with some other slave. Obviously for a tri-state bus, this will not be true of the data lines as they should be held high-impedance unless explicitly driven by an Avalon master accessing something on the bus. For other signals such as address/read/write, however, the signals from other bus transfers will show up on those signals. Hope this helps.