Honored Contributor
Honored ContributorThe data cache he was talking about is on the CPU, not on the UART. If you have a data cache on the CPU, your instructions that attempt to write to the UART could end up writing only to the cache instead. This is why it is usually recommended to use the IORD/IOWR macros to access devices rather than pointers.
In your case it shouldn't be a problem as you are using a Nios II/e, which doesn't have data cache IIRC, but you should keep it in mind if you plan to use a bigger Nios II CPU one day. I still think you should get now the good habit of using IORD/IORW though ;)
