uncontrolled SDRAM content change

I don't know how the memory monitor works, but it could go through the data cache, and therefore use it and trigger cache flushes/loads. Maybe someone knows how it is done.

Anyway it is always possible to define the cache size as 0 in the Nios parameters to disable the cache and see if the problems are still there.

The only two other explanations I can find are indeed a problem in the SDRAM access parameters (especially the refresh rate, but in my experience you need several seconds to loose content when you messed up the DRAM refresh) or that something else, like a DMA, or an interrupt routine from the software, is overwriting your memory buffer. It could be a good idea to put some signaltap probes around the SDRAM controller to see if anything is happening.