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Altera_Forum
Honored Contributor
Honored Contributoruncontrolled SDRAM content change
Hi, I use a code which checks external SDRAM () by writing 0xAAAA and 0x5555 patterns. But the code always return an error code! When I check step by step SDRAM content with NIOSII IDE I can ...
Altera_ForumHonored Contributor
Honored ContributorAre you sure the parameters of the sdram controller match your MT48LC4M32 device? I mean CAS latency, refresh period, tRCD, tRAS and so on.
Is your Quartus project fully time constrained and does it meet timing? What's the Nios/sdram clock frequency?
