Hi Everyone Has anyone ever used uCos TCP/IP stack with the DM9000A ethernet MAC+PHY (Davicom) ? This is for the DE2 board sold to universities by Altera. If anyone has experience on interfacing ano other MAC+PHY chip (other than the LAN91C111), I&#39;d like to ear about what&#39;s involved in getting seomthing like this up and running. With Regards Nir

Hello, I&#39;ve just finished the DE2 DM9000A ethernet driver within uCOS. and now I&#39;m working on the Opencore MAC driver, I think we can talk more about this. http://forum.niosforum.com/work2/style_emoticons/<#EMO_DIR#>/smile.gif feel free to mail me at animeidea@gmail.com

We have bought 7 DE2 cards and tried the web server demo provided on the terasic web site. But we experienced problems with it. We connected the DE2 card directly to another PC and tried it. It worked and at some point the communication stops. We tried repeated ping operations. After one minute, the DE2 card stops responding. The uCos continue to run apparently. Since I doubt the problem could be in the lwip package or in the hardware, I suspect the driver. So I look for advice and possible solution. We have an urgent need for this.

--- Quote Start --- originally posted by chmike@Oct 19 2006, 02:35 PM we have bought 7 de2 cards and tried the web server demo provided on the terasic web site. but we experienced problems with it. we connected the de2 card directly to another pc and tried it. it worked and at some point the communication stops. we tried repeated ping operations. after one minute, the de2 card stops responding. the ucos continue to run apparently. since i doubt the problem could be in the lwip package or in the hardware, i suspect the driver. so i look for advice and possible solution. we have an urgent need for this. <div align='right'><{post_snapback}> (index.php?act=findpost&pid=18795) --- quote end --- --- Quote End --- I too tried the web server example and had similar problems...

Hello, --- Quote Start --- originally posted by dave@Nov 5 2006, 04:01 AM i too tried the web server example and had similar problems... --- Quote End --- I am investigating the problem. The web server driver manages to initialize itself with DHCP but we have this hang after less than a minute repetitive ping operation. Cstc1 very kindly sent me his driver that I tested thursday and friday. Unfortunately I didn&#39;t manage to make it initialize itself with DHCP, but it keeps capturing packets on the network for many minutes without hanging. I couldn&#39;t test the ping yet. I will try with &#39;hard wired&#39; ip address today. The most important difference between the two codes is that cstc1 has made packet sending and receiving a critical section with a semaphore. Another difference is that Cstc1 interrupt handling code is simply queuing a request to process incomming data, where the web server driver read in the packet while in the interrupt code. These two difference may explain why cstc1 driver is more stable. Though I have some doubts on its performance since it adds 20usec after reading each data out of the driver. Is that required ? The reason why it can&#39;t initialize with DHCP is also still unclear now. cstc1 driver is also very terse in the feedback on the link up/down state or stats. But for now we look for a working solution.

--- Quote Start --- originally posted by chmike+nov 6 2006, 12:03 pm--><div class='quotetop'>quote (chmike @ nov 6 2006, 12:03 pm)</div> --- quote start --- hello, <!--quotebegin-dave@Nov 5 2006, 04:01 AM i too tried the web server example and had similar problems... --- Quote End --- I am investigating the problem. The web server driver manages to initialize itself with DHCP but we have this hang after less than a minute repetitive ping operation. Cstc1 very kindly sent me his driver that I tested thursday and friday. Unfortunately I didn&#39;t manage to make it initialize itself with DHCP, but it keeps capturing packets on the network for many minutes without hanging. I couldn&#39;t test the ping yet. I will try with &#39;hard wired&#39; ip address today. The most important difference between the two codes is that cstc1 has made packet sending and receiving a critical section with a semaphore. Another difference is that Cstc1 interrupt handling code is simply queuing a request to process incomming data, where the web server driver read in the packet while in the interrupt code. These two difference may explain why cstc1 driver is more stable. Though I have some doubts on its performance since it adds 20usec after reading each data out of the driver. Is that required ? The reason why it can&#39;t initialize with DHCP is also still unclear now. cstc1 driver is also very terse in the feedback on the link up/down state or stats. But for now we look for a working solution. <div align='right'><{post_snapback}> (index.php?act=findpost&pid=19205)</div> [/b] --- Quote End --- Hi, I did a little poking around. It seems that the board stops responding because it stops correctly receiving packets. I don&#39;t think this is a driver issue (although making changes to the driver seems to affect the frequency of the errors, not sure why). My reason for saying this: The ethernet controller writes received packets into a circular buffer. The driver reads this buffer using a special register that slides along the buffer every time it is read (0xf2) (plus another register that just reads the value at the current position without sliding (0xf0)). When a packet is available in the buffer, the data from the current position should look something like: 01 <status> <packet length> <packet data> <crc> [next packet...] Or when a packet is not available: 00 So after an interrupt from the ethernet controller, the driver reads the first byte (without sliding the position) to check that it is 01 before continuing. Having put some printfs in the driver code, I found that after a short while the first byte is neither 00 or 01 but some seemingly random number. This would seem to indicate that the driver had gotten "out-of-sync" with the ethernet controller in terms of the position of the sliding register, but I&#39;ve compared the packet receiving code with the datasheets and "application notes" (which basically contain example driver code) and it appears to match perfectly. However, I added some more printfs to display the 01/00 byte, and if the byte was 01, the following status and packet length, and if the byte wasn&#39;t 01 or 00 (IE some random number), the next 200 bytes in the buffer. I then pinged the board (monitoring with ethereal), output was: Use static IP configuration, IP =# 192.168.0.128 01 status: 0001 length: 004a 00 01 status: 0001 length: 004a 00 01 status: 0001 length: 004a 00 01 status: 0001 length: 004a 00 01 status: 0001 length: 004a 00 01 status: 0001 length: 0042 66 =========== 6766 6968 fb57 2bf4 1100 08 45 3c00 456b 00 180 284e a8c0 100 a8c0 200 08 5c39 0 4 10 6261 6463 6665 6867 6a69 6c6b 6e6d 706f 7271 7473 7675 6177 6362 6564 6766 6968 45d4 f887 01 4e 9000 ae00 00 1100 cd09 1172 08 45 3c00 836c 00 180 ea4c a8c 0 100 a8c0 200 08 5c38 04 11 6261 6463 6665 6867 6a69 6c6b 6e6d 706f 7271 7473 7 675 6177 6362 6564 6766 6968 e546 270a 01 4e 9000 ae00 00 1100 cd09 1172 08 45 3 c00 dd6c 00 180 904c a8c0 100 a8c0 200 08 5c37 =========== According to ethereal, all packets sent were length 74 (4a hex), but the length of the last packet as read from the ethernet controller was 42 hex (8 less). The first 4 bytes in the buffer match those reported in ethereal as the last in the packet (with 4 byte checksum following). The next byte is then 00 as expected (to indicate no more packets). Sorry about the format of the data --- it&#39;s all little endian but printed as 16-bit ints. I have tried inserting delays (up to 50us) between reads and writes to the ethernet controller, no difference. I can only assume this means that the data is getting corrupted either in the RAM on the ethernet controller or when it is read from the controller. I have tried lowering the NIOS system clock from 100MHz to 50MHz and playing with the settings for the PLL controlling the clock to the controller, no difference. My board may be faulty but as you seem to be experiencing similar problems I&#39;m not so sure... I don&#39;t really have any experience with this kind of thing so I&#39;m not sure what to try next...

uCos with a DM9000A | Altera Community

19 Replies

Altera_Forum
Honored Contributor
19 years ago
Hello,

I have reported the problem to Altera that forwarded it to Terasic. I received the following suggestions. Unfortunately I could not test it yet.

We don't have any clue on this situation, but I think this is Quartus II 6.0
bug. The Avalon bus timing is difference between QuartusII 6.0 and 5.1.
1. If you use Quartus II and Nios II 6.0, please upgrade DE2_project from
the following link.
terasic link (http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=39&no=95)
2. You can use DE2_NET project to test your Ethernet. This test program was
in the DE2 CD-ROM. Please refer the user manual page 63.
3. Please download the new version DE2 CD-ROM from the next link, this
version was fully compatible with Quartus II 6.0 and Nios II 6.0.
http://www.terasic.com/downloads/cd-rom/de...em_v1.4_new.iso (http://www.terasic.com/downloads/cd-rom/de2/de2_system_v1.4_new.iso)
Altera_Forum
Honored Contributor
19 years ago
I would be very glad to have a copy of the patch and how to apply it.
We have an urgent need for this. We use Quartus 5.1 so the 6.0 should not apply.
Altera_Forum
Honored Contributor
19 years ago
Hello again, sorry for the delay. I have uploaded fixed files etc and instructions on how to apply here:
http://sp4m.net/de2_web_fix.zip (http://sp4m.net/de2_web_fix.zip)

I have tested the TCP/IP performance with a simple echo server running on the board and a corresponding app running on my PC (connected directly to the board). I get about 550KB/s each way. With traffic going only one way from the board to the PC (just ACK packets going the other way), I get about 3MB/s. The HTTP server example works, but seems a little slow. I haven't looked into why this is. I have not tested DHCP, I'm using a static IP.
Altera_Forum
Honored Contributor
19 years ago
The patch solves my problem.

We see some RX buffer overflow but it is quite unfrequent. We lost 7 packets on 51,000 packets with a ping with 1024 byte long packets. It is good enough for our application.

Thank you very much Dave. Very impressive work. I hope Terasic will provide an updated version of their DE2 CD very soon. We didn't receive any useful help from them !
Altera_Forum
Honored Contributor
19 years ago
--- Quote Start ---
originally posted by dave@Nov 16 2006, 07:36 PM
hello again, sorry for the delay. i have uploaded fixed files etc and instructions on how to apply here:
http://sp4m.net/de2_web_fix.zip (http://sp4m.net/de2_web_fix.zip)

i have tested the tcp/ip performance with a simple echo server running on the board and a corresponding app running on my pc (connected directly to the board). i get about 550kb/s each way. with traffic going only one way from the board to the pc (just ack packets going the other way), i get about 3mb/s. the http server example works, but seems a little slow. i haven't looked into why this is. i have not tested dhcp, i'm using a static ip.
<div align='right'><{post_snapback}> (index.php?act=findpost&pid=19480)
--- quote end ---

--- Quote End ---

I have the ver 1.4a terasic code and have attempted in stall your patch; however, it does NOT seem to work with this version.

1) DE2_NIOS.V does not exist (DE2_WEB.V)
2) After making the changes the DM9000A interface nolonger has a 25MHz clock driving it. Therefre, it no longer works at all.

Any help would be appreciated.
Altera_Forum
Honored Contributor
19 years ago
--- Quote Start ---
originally posted by mikehsr+jan 2 2007, 04:30 pm--><div class='quotetop'>quote (mikehsr @ jan 2 2007, 04:30 pm)</div>
--- quote start ---
<!--quotebegin-dave@Nov 16 2006, 07:36 PM
hello again, sorry for the delay. i have uploaded fixed files etc and instructions on how to apply here:
http://sp4m.net/de2_web_fix.zip (http://sp4m.net/de2_web_fix.zip)

i have tested the tcp/ip performance with a simple echo server running on the board and a corresponding app running on my pc (connected directly to the board). i get about 550kb/s each way. with traffic going only one way from the board to the pc (just ack packets going the other way), i get about 3mb/s. the http server example works, but seems a little slow. i haven't looked into why this is. i have not tested dhcp, i'm using a static ip.
<div align='right'><{post_snapback}> (index.php?act=findpost&pid=19480)
--- quote end ---

--- Quote End ---

I have the ver 1.4a terasic code and have attempted in stall your patch; however, it does NOT seem to work with this version.

1) DE2_NIOS.V does not exist (DE2_WEB.V)
2) After making the changes the DM9000A interface nolonger has a 25MHz clock driving it. Therefre, it no longer works at all.

Any help would be appreciated.
<div align='right'><{post_snapback}> (index.php?act=findpost&pid=20320)</div>
[/b]
--- Quote End ---

I assume you mean the DE2_WEB_QII_60.rar file available from http://www.terasic.com.tw/cgi-bin/page/arc...goryno=39&no=30 (http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=39&no=30).

The patch should work (I haven't tried) if you apply as in the readme, but also remove from DE2_WEB.v the lines passing the 50MHz clock input and ethernet clock output to the dm9000a interface module (you've probably already done this) and add a line to drive the ethernet clock:

assign ENET_CLK = CLK_25;

(CLK_25 is a 25MHz clock generated by the SDRAM_PLL)
Altera_Forum
Honored Contributor
19 years ago
TO_BE_DONE
Altera_Forum
Honored Contributor
19 years ago
Has anyone been able to build the webserver example using EDS6.1 & nichestack ?
Altera_Forum
Honored Contributor
16 years ago
Thanks for your question. Could you please be more specific as to which World Bank publication you are looking at, which years you say the forecast differences are "huge", and if you are referring to the world output aggregate based on PPP exchange rates or market exchange rates? From there, we might be able to provide you with more information.

Best,
_____________________________________
Website I designed for paydayloan (http://www.paydaytown.com) company.

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uCos with a DM9000A

19 Replies

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