uCos with a DM9000A

The 6 most significant bits of S1 correspond to the 6 most significant bits of register 0x32 if CRC check has been enabled. S2 is a copy of register 0x06.

If you set bits asking to reject packets with invalid CRC, this eliminates truncated packets. But from time to time we get a packet with a valid CRC but the byte 0x00 has not been written. What is more strange is that even if a good packets arrive after it, the 0x01 is not written.

To enable rejection of packets with CRC errors, there are apparently two bits to set. One in register 0x32 and one in register 0x05. Though this result in packet loss.

Now I see that the uCOS crashes are becoming more frequent. Don't know here this comes from.