uclinux PIO device driver interrupt handler not execute

Hi,

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1) Enabling the PIO Core interrupt:

Because my PIO base address is 0x00000060 on the a clock_crossing_bridge w/ base address of 0x08200000, my driver define base address is 0x082000060 (<-Is this correct?)# define ALTERA_PIO_BASE_ADDRESS 0x08200060# define ALTERA_OFFSET_DATA 0x00# define ALTERA_OFFSET_DIRECTION 0x01# define ALTERA_OFFSET_IRQ_MASK 0x02# define ALTERA_OFFSET_EDGE_CAPTURE 0x03

...

in probe function I have

volatile int *base_addr = (int *) ALTERA_PIO_BASE_ADDRESS;

...

*(base_addr + ALTERA_OFFSET_IRQ_MASK) = 0x01; //One input PIO from the SMA pin in the DE2-115, rising edge interrupt generator

2) __builtin_wrctl(3, 3); //irq2, write into ienable register (3)

__builtin_wrctl(0, 1); //write 1 into status register (0) to enable PIE

I got Kernel panic - not syncing: Oops

Unable to handle kernel paging request at virtual address 08200000

ea = c70e418c, ra = c70e4178, cause =15

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At first, please don't forget the existence of MMU. All cpu's memory accesses are filtered by it. So you must convert the virtual address 0x08200000 to I/O memory space one. According to the formal way, you should use the function 'ioremap' like

volatile int *base_addr = ioremap(ALTERA_PIO_BASE_ADDRESS,  16);

but for the convenience test, please try next code

volatile int *base_addr = (int *) (ALTERA_PIO_BASE_ADDRESS | 0xe0000000);

And because cpu's control registers are controlled by the kernel core, you don't need to tamper those like

__builtin_wrctl(3, 3); //irq2, write into ienable register (3)
__builtin_wrctl(0, 1); //write 1 into status register (0) to enable PIE

There is also a formal way to set or reset these bits, so you should not touch control registers directly except the case you are sure what you do.

Kazu