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Altera_Forum's avatar
Altera_Forum
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21 years ago

uart

hi all, has anybody seen a problem where bit 7 received for incoming characters appears wrong? using a niosii 50MHz and adding a uart with 9600 8,n,1 hooking it up to Hyperterminal on wind...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
21 years ago

This looks suspiciously like the UART baud divisor is incorrect. The divisor is calculated based on the clock speed you enter into SOPC Builder at system-generation-time. You might make sure that your SOPC Builder system is re-generated & quartus project re-compiled (to ensure that the baud divisor is properly set in the FPGA), and then that your oscillator/PLL is driving 50Mhz, not 50.02 or 49.98....