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Altera_Forum
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16 years ago

UART loses bytes

Hi

I have a problem with the uart:

I can send single bytes from PC to FPGA and loop them back with out problem at baud rates up to 3MBd. But as soon as I write more than one byte at once or more bytes one after the other without delay, the FPGA loses some bytes. It gets worse with higher baud rates, but happens already at 9600Bd.

my setup:

- Cyclon II

- Nios II

- I use HAL to access the UART

some suggestions would be great

Thanks

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  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    Hi FvM

    I was away some day, now I'm back but still fighting with the uart problem.

    With the oscilloscope the signal looks fine to me.

    Now I'll build a new NIOS system with only the necessary SOPC modules for the uart and see if it works.

    But could this D16550 UART with FIFO solve my problem?

    Best
  • Altera_Forum's avatar
    Altera_Forum
    Icon for Honored Contributor rankHonored Contributor
    16 years ago

    How to physically wire the JTAG 10 pins to become a RS232 connector?

    I understand that the RS232 must be converted to TTL, I have a tiny board that does so, and out put 4 pins, how to connect them to the JTAG 10 pins, and how to find which FPGA pins are connected to the JTAG pins?

    I am using Cyclone III Starter Board.

    I found this document (link below), does it help my problem?

    http://www.altera.com/literature/hb/cyc/cyc_c51013.pdf?gsa_pos=1&wt.oss_r=1&wt.oss=chapter%2013%20configuring%20cyclone%20iii

    Thanks in advance for your help.