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Altera_Forum's avatar
Altera_Forum
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15 years ago

TSE transmit and receive buffers

I'm trying to build NIOS II system with Triple Speed Ethernet in SuperLoop mode (DP83848C PHY). I applied the patch to get iniche in SuperLoop mode.

Partitialy it works - I can receive packets (ARP, PING), but when it tryes to reply, 80% of cases fails because new arrived ethernet packets overwrites transmit buffer (in some cases correct reply arrives, in some cases part of data is mixed with new packets, and most of the cases packet does not arrive to the computer at all).

Where could be a problem?

As I understand, descriptors of sgdma_tx/tx should take care about the buffers, isn't it?

I attached a connection of ethernet block of sopc builder.

Thanks in advance for any comments.

6 Replies

  • Altera_Forum's avatar
    Altera_Forum
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    Finally I solved it.

    Seems that it was a problem with a data cache - new formed packed still resided in a cache, and sgdma_tx moved old data to the MAC.

    I used my own hardware (not a KIT) with other periphery, and it highlighted the problem of low level ethernet driver.

    If anybody else will stuck with such problem, here is a solution:

    File: ins_tse_mac.c

    function: tse_mac_raw_send

    Just after the OS_ENTER_CRITICAL(); added the following:

    alt_dcache_flush_all();

    Now everything is working well!
  • Altera_Forum's avatar
    Altera_Forum
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    It could be a better idea to only flush the transmit buffer, not all the cache. If the receive buffer is in the cache and a packet is received just before you call alt_dcache_flush_all(), then the new received packet will be overwritten by old data from the cache.

    In fact I'm surprised the TSE driver doesn't allocate the 'mbuff' buffers in uncached memory, I thought it did it automatically.
  • Altera_Forum's avatar
    Altera_Forum
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    Use this function instead:

    /*
     * alt_dcache_flush() is called to flush the data cache for a memory
     * region of length "len" bytes, starting at address "start".
     * Any dirty lines in the data cache are written back to memory.
     */
    extern void alt_dcache_flush (void* start, alt_u32 len);

  • Altera_Forum's avatar
    Altera_Forum
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    You'll need to add some protocol headers (probably MAC+IP+UDP) to the ethernet packet in order to be able to receive it.

    It is possible to write vhdl to do that, but it won't be easy!

    I can't remember whether the dma normally associated with the TSE does scatter/gather (with support for misalingen buffers), if so you might manage to get it to read from a IO FIFO (for the packet data) by aliasing the FIFO read port into a large block of adjacent addresses.

    Unfortunately the SPOC builder doesn't like letting you set address aliasing!

    (Address aliasing can speed up the bus cycles and might well increase FMax. eg aliasing small IO into (say) 1k blocks and aliasing everything against a large memory block.)