Forum Discussion
Honored ContributorTSE_MAC and memory
Hi Guys,
I've been building on examples and built a functioning ethernet. I can use the Nios for TCP TX/RX and i have interfaced some HDL for direct UDP TX. I'm currently developing on a DE2-115 and i'm merging this and the D5M camera example. I'll be building my own board soon. Problem is both use the SDRAM in their isolation and i need to merge. de2-115 has - sdram 2x64mb(16bit wide) used together as 32bit wide. - sram - 2mb 1. how can i determine how much memory the tse_mac needs? 2. does the niche stack use the sram? regarding point 1: the example i took just used the full 128mb and the BSP says it uses it all, but i imagine that more means it allocates it all. [update] point 2: I've tried to remove the SRAM in the past but my ethernet initialisation gets stuck after
INFO : TSE MAC 0 found at address 0x0c042000
INFO : PHY Marvell 88E1111 found at PHY address 0x10 of MAC Group
INFO : PHY - Automatically mapped to tse_mac_device
INFO : PHY - Restart Auto-Negotiation, checking PHY link...
INFO : PHY - Auto-Negotiation PASSED28 Replies
Altera_ForumNo, the stack use memory allocation, not the particular device. Remove SRAM in SOPC, choose proper vectors for Nios, regenerate base addresses and regenerate the system. Also check if Your timers are correct.
- Altera_Forum
Hello,
I'am interested about this thread. Socrates, can you develop your explication about vector in sopc and adresses. I tried but it don't work. Do you use only one onchip memory or two (one for the software execution and the other for sgdma)? thanks - Altera_Forum
The only on-chip memory component is used only for SGDMA descriptors, everything else is placed in SDRAM.
You can edit linker script for addresses, bet I would offer to use default values for starters. - Altera_Forum
Yes but what can I do if I want removing SDRAM ?
I need to add an other onchip memory. What about adresses, reset exception, vector exeption and linker @ in SBT ? - Altera_Forum
Then add on-chip memory instead of SDRAM, but it has to be big enough, to fit all the Nios software. If You'll use TCP/IP stack and/or RTOS, I doubt You'll get Your work done.
- Altera_Forum
My software is around 380 kbytes. I've got an on-chip memory set to 512 Kbytes.
But my code blok at : /* Wait for the descriptor (chain) to complete */ while ( (IORD_ALTERA_AVALON_SGDMA_STATUS(dev->base) & ALTERA_AVALON_SGDMA_STATUS_BUSY_MSK) ); I don't know why ? But works with ssram. - Altera_Forum
I am not sure if the software size also includes memory allocation stuff. If not, You're short of memory and SGDMA never gets write correctly. On the other hand, check if malloc() allocated memory successfully.
- Altera_Forum
Thanks to all for your thoughts.
SOCRATES What exactly are you referring to when saying --- Quote Start --- Also check if Your timers are correct. --- Quote End --- Are you referring to in the BSP Settings for sy_timer etc? Setting them to JTAG? - Altera_Forum
the system requires a particular timer. Afaik they use sys_clk_timer or something. Check the reference design.
- Altera_Forum
note: the timer problem was actually the dhcp problem from my stupid moment when i enabled the "set_1000". It actually gets stuck after the autonegotiation.
recap: - I have a working ethernet design with its hardware based on the de2-115 webserver example and the software based on the sss example. - When i remove the SRAM, it gets stuck in the Nios initialisation of the ethernet design. [update] point 2: I've tried to remove the SRAM but my ethernet initialisation gets stuck after
The way i've removed it is: 1. I've left the pin assignments as is in the Quartus pin planner. 2. I deleted the Terasic SRAM module from the qsys. It doesn't appear to connect anywhere special. 3. I've checked through all the module settings (nios, tse etc) in Qsys and can't find anything that refers to the SRAM. 4. I've commented it out of the module instantiation as to align with the Qsys change. According to the BSP linker, nothing seems to link it. I've checked what i can timer wise. I also remember the first time i tried to do this, i did a signal tap on the sram and didn't pick up any enabling of it, or changes in data. But i may have missed something there. Any ideas, because i'm out of them?INFO : TSE MAC 0 found at address 0x0c042000 INFO : PHY Marvell 88E1111 found at PHY address 0x10 of MAC Group INFO : PHY - Automatically mapped to tse_mac_device INFO : PHY - Restart Auto-Negotiation, checking PHY link... INFO : PHY - Auto-Negotiation PASSED
