tristate slave component

But sometimes it would be very nice to know how to setup an tristate slave with hdl ...

i wish i had a doc that describes this.

avalon tristate (and external signals) <-> verilog source

reason : i wish i could modify the always read 32bit to an external 8bit device with only the requestes bytes to be read.

my only solutions is a complete sopc module, but i have not succeded in a tri state slave. avalon <-> verilog <-> external signals

mysupport even too was not able to give me such a doc :-(

Michael